nmigen-learning/fpga/icebreaker_vga.dg

import "/nmigen_boards.icebreaker/ICEBreakerPlatform"
import "/nmigen_dg/*"
import "/sys"
import "common/to_signed"
import "modules/vga/DviController12"
import "stdio/ice40pll/add_domain_from_pll"
import "resources/pmod"



Top = subclass Elaboratable where
    __init__ = x y fps ~> None where
        @x, @y, @fps  = x, y, fps

    elaborate = platform ~> m where with m = Module! =>

        # Configure DVI controller
        dvi = Submodule.dvi$ DviController12 @x @y @fps

        # setup clock
        pll_config = add_domain_from_pll platform dvi.pix_freq


        # Feed a picture to the DVI controller

        scroll = Signal 8

        period = int$ pll_config.achieved / @fps
        counter = Signal$ range period
        Sync$ counter ::= counter - 1
        When (counter==0) $ ->
            Sync$ counter ::= int period
            Sync$ scroll  ::= scroll + 1

        Sync$ dvi.r ::= 0x0
        Sync$ dvi.g ::= 0x0
        Sync$ dvi.b ::= 0x0
        cx = to_signed dvi.pixel_x - (@x // 2)
        cy = to_signed dvi.pixel_y - (@y // 2)
        rx = cx * cx
        ry = cy * cy
        tx1 = (dvi.pixel_x - scroll     ) & (1<<5)
        ty1 = (dvi.pixel_y - scroll     ) & (1<<5)
        tx2 = (dvi.pixel_x + scroll     ) & (1<<6)
        ty2 = (dvi.pixel_y + scroll + 40) & (1<<6)
        When
            rx + ry < 200**2 ,->
                Sync$ dvi.r ::= 0xF
                #Sync$ dvi.g ::= 0xF
                Sync$ dvi.b ::= 0xF

            tx1 ^ ty1 ,->
                Sync$ dvi.b ::= 0xF

            tx2 ^ ty2 ,->
                Sync$ dvi.r ::= 0xF
                Sync$ dvi.g ::= 0xF


if __name__ == "__main__" =>
    plat = ICEBreakerPlatform!
    plat.add_resources$ pmod.dvi_12bit 0
    plat.add_resources$ plat.break_off_pmod
    plat.build (Top 800 480) do_program: ("--flash" in sys.argv) synth_opts: "-dsp"