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Initialize a memory, change pmod builder signature

This commit is contained in:
Peder Bergebakken Sundt 2020-08-15 01:53:34 +02:00
parent 371c623012
commit e1efe9a245
2 changed files with 32 additions and 17 deletions
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36
fpga/icebreaker.dg
View File

@ -13,9 +13,9 @@ Top = subclass Elaboratable where
@ledg = platform.request "led_g" 0 @ledg = platform.request "led_g" 0
@seg7 = platform.request "seven_seg" @seg7 = platform.request "seven_seg"
blinker = (Submodule$ Blinker$ freq // 3 ).out blinker = (Submodule.blinker$ Blinker$ freq // 3 ).out
pulser = (Submodule$ Pulser$ freq // 10).out pulser = (Submodule.pulser $ Pulser$ freq // 2).out
seg7 = Submodule$ Segment7x2 decimal: True seg7 = Submodule.seg7$ Segment7x2 decimal: False
Comb$ Drive @ledr blinker Comb$ Drive @ledr blinker
@ -25,15 +25,27 @@ Top = subclass Elaboratable where
Comb$ Drive @ledg ff Comb$ Drive @ledg ff
counter = Signal 8 counter = Signal 4
When pulser $ -> When pulser $ ->
Sync$ Drive counter (counter + 1) Sync$ Drive counter (counter + 1)
Comb$ Drive seg7.number counter # TODO: learn SPI FLASH
mem = Memory
width: 8
depth: 16 # ew
init: ([0xde, 0xad, 0xbe, 0xef]*4)
rdport = Submodule.rdport$ mem.read_port!
Comb$ Drive rdport.addr counter
Comb$ Drive seg7.number rdport.data
#Comb$ Drive seg7.number counter
Comb$ Drive @seg7 (Cat seg7.segs seg7.select) Comb$ Drive @seg7 (Cat seg7.segs seg7.select)
@ledr = Cat
@leds = Cat
platform.request "led_g" 4 platform.request "led_g" 4
platform.request "led_g" 2 platform.request "led_g" 2
platform.request "led_g" 3 platform.request "led_g" 3
@ -44,7 +56,7 @@ Top = subclass Elaboratable where
@btn_l = platform.request "button" 3 @btn_l = platform.request "button" 3
state = Signal 4 reset: 0b1000 state = Signal 4 reset: 0b1000
Comb$ Drive @ledr state Comb$ Drive @leds state
Comb$ Drive @ledm (@btn_r | @btn_l) Comb$ Drive @ledm (@btn_r | @btn_l)
When (on_rising_edge @btn_l) $ -> When (on_rising_edge @btn_l) $ ->
@ -54,7 +66,8 @@ Top = subclass Elaboratable where
When (on_rising_edge @btn_m) $ -> When (on_rising_edge @btn_m) $ ->
Sync$ Drive state ~state Sync$ Drive state ~state
on_rising_edge = signal ->
on_rising_edge = signal ->
prev = Signal (signal.shape!) prev = Signal (signal.shape!)
Sync$ Drive prev signal Sync$ Drive prev signal
~ signal.implies prev ~ signal.implies prev
@ -62,6 +75,7 @@ Top = subclass Elaboratable where
if __name__ == "__main__" => if __name__ == "__main__" =>
plat = ICEBreakerPlatform! plat = ICEBreakerPlatform!
plat.add_resources$ pmod.seven_seg pmod: 0 # pmod 1a plat.add_resources$ pmod.seven_seg 0 pmod: 0 # pmod 1a
plat.add_resources$ pmod.dip_switch8 pmod: 1 # pmod 1b plat.add_resources$ pmod.dip_switch8 0 pmod: 1 # pmod 1b
plat.build Top! do_program: True plat.add_resources$ plat.break_off_pmod
plat.build Top! do_program: ("--flash" in sys.argv)

7
fpga/resources/pmod.py
View File

@ -11,10 +11,10 @@ def pmod(func):
# Icebreaker PMODs # Icebreaker PMODs
Attrs(IO_STANDARD="SB_LVCMOS33") #subsignal_args = [Attrs(IO_STANDARD="SB_LVCMOS33")]
@pmod @pmod
def seven_seg(*, pmod, name = "__name__", number = 0, index = 0, subsignal_args=(), extras={}): def seven_seg(number, *, pmod, name = __name__, subsignal_args=(), extras={}):
return [Resource(name, number, return [Resource(name, number,
Subsignal("aa", PinsN( "1", dir="o", conn=("pmod", pmod)), *subsignal_args), Subsignal("aa", PinsN( "1", dir="o", conn=("pmod", pmod)), *subsignal_args),
Subsignal("ab", PinsN( "2", dir="o", conn=("pmod", pmod)), *subsignal_args), Subsignal("ab", PinsN( "2", dir="o", conn=("pmod", pmod)), *subsignal_args),
@ -27,8 +27,9 @@ def seven_seg(*, pmod, name = "__name__", number = 0, index = 0, subsignal_args=
**extras, **extras,
)] )]
@pmod @pmod
def dip_switch8(*, pmod, name = "__name__", number = 0, index = 0, subsignal_args=(), extras={}): def dip_switch8(number, *, pmod, name = __name__, subsignal_args=(), extras={}):
return [Resource(name, number, return [Resource(name, number,
Subsignal("d1", PinsN( "1", dir="i", conn=("pmod", pmod)), *subsignal_args), Subsignal("d1", PinsN( "1", dir="i", conn=("pmod", pmod)), *subsignal_args),
Subsignal("d2", PinsN( "2", dir="i", conn=("pmod", pmod)), *subsignal_args), Subsignal("d2", PinsN( "2", dir="i", conn=("pmod", pmod)), *subsignal_args),