Implement a controller for the icebreaker 7-segment display pmod
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fpga/modules/segment7.dg
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59
fpga/modules/segment7.dg
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#!/usr/bin/env -S python3 -m dg
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import "/nmigen_dg/*"
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import "/nmigen/cli/main"
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# iCEBreaker 7-Segment Pmod
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Segment7 = subclass Elaboratable where
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__init__ = output_hex: True ~> None where
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@number = Signal 8 # i
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@pmod = Signal 8 # o
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@format_hex = output_hex
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elaborate = platform ~> m where with m = Module! =>
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select = Signal!
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Sync$ Drive select ~select
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s1 = Submodule$ Digit2Segs!
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s2 = Submodule$ Digit2Segs!
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if @format_hex =>
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Comb$ Drive s1.digit $ @number >> 4
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Comb$ Drive s2.digit $ @number & 0x0f
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if not @format_hex =>
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Comb$ Drive s1.digit $ @number // 10
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Comb$ Drive s2.digit $ @number & 10
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Comb$ Drive @pmod $ Cat
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Mux select s1.segs s2.segs
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select
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Digit2Segs = subclass Elaboratable where
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__init__ = self -> None where
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@digit = Signal 4
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@segs = Signal 7
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elaborate = platform ~> m where with m = Module! =>
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Switch self.digit
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0x0 ,-> Comb$ Drive @segs 0b0111111
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0x1 ,-> Comb$ Drive @segs 0b0000110
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0x2 ,-> Comb$ Drive @segs 0b1011011
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0x3 ,-> Comb$ Drive @segs 0b1001111
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0x4 ,-> Comb$ Drive @segs 0b1100110
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0x5 ,-> Comb$ Drive @segs 0b1101101
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0x6 ,-> Comb$ Drive @segs 0b1111101
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0x7 ,-> Comb$ Drive @segs 0b0000111
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0x8 ,-> Comb$ Drive @segs 0b1111111
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0x9 ,-> Comb$ Drive @segs 0b1101111
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0xa ,-> Comb$ Drive @segs 0b1110111
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0xb ,-> Comb$ Drive @segs 0b1111100
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0xc ,-> Comb$ Drive @segs 0b0111001
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0xd ,-> Comb$ Drive @segs 0b1011110
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0xe ,-> Comb$ Drive @segs 0b1111001
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0xf ,-> Comb$ Drive @segs 0b1110001
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if __name__ == "__main__" =>
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design = Seg7!
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main design ports: [design.pmod]
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