nmigen-learning/fpga/modules/pulser.dg

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import "/nmigen/cli/main"
import "/nmigen_dg/*"
Pulser = subclass Elaboratable where
__init__ = ncycles ~> None where
@ncycles = ncycles
@out = Signal!
elaborate = platform ~> m where with m = Module! =>
Sync$ @out :== 0
counter = Signal$ range (@ncycles + 1)
Sync$ counter :== counter - 1
When (counter == 0) $ ->
Sync$ @out :== HIGH
Sync$ counter :== @ncycles
if __name__ == "__main__" =>
pulser = Pulser ncycles: 10000000
main pulser name: "pulser" ports: [pulser.out]