nmigen-learning/fpga/icebreaker_vga.dg

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import "/nmigen_boards.icebreaker/ICEBreakerPlatform"
import "/nmigen_dg/*"
import "/sys"
import "common/to_signed"
import "modules/vga/DviController12"
import "modules/bad_apple/BadAppleDecoder"
import "stdio/ice40pll/add_domain_from_pll"
import "resources/pmod"
Top = subclass Elaboratable where
__init__ = x y fps ~> None where
@x, @y, @fps = x, y, fps
elaborate = platform ~> m where with m = Module! =>
# Configure DVI controller
dvi = Submodule.dvi$ DviController12 @x @y @fps
# setup clock
pll_config = add_domain_from_pll platform dvi.pix_freq
print pll_config
'''
# Feed bad_apple to the DVI controller
apple = Submodule.apple$ BadAppleDecoder!
buffer = Memory
width: 1
depth: apple.size
rdbuffer = Submodule.rdbuffer$ buffer.read_port!
wrbuffer = Submodule.wrbuffer$ buffer.write_port!
Sync$ wrbuffer.en ::= apple.pixel_valid
Sync$ wrbuffer.addr ::= apple.pixel_x + apple.pixel_y*apple.h
Sync$ wrbuffer.data ::= apple.pixel_data
wait = Signal 30 reset:1
Comb$ apple.next ::= 0
When dvi.vblank_start $ ->
Sync$ wait ::= wait.rotate_left 1
Comb$ apple.next ::= wait!!0
Comb$ rdbuffer.addr ::= (dvi.pixel_x >> 3) + (dvi.pixel_y >> 3)*apple.h
pixel = Cat rdbuffer.data rdbuffer.data rdbuffer.data rdbuffer.data
Sync$ dvi.r ::= pixel
Sync$ dvi.g ::= pixel
Sync$ dvi.b ::= pixel
'''
# Feed a picture to the DVI controller
scroll = Signal 8
period = int$ pll_config.achieved / @fps
counter = Signal$ range period
Sync$ counter ::= counter - 1
When (counter==0) $ ->
Sync$ counter ::= int period
Sync$ scroll ::= scroll + 1
asd = Cat
platform.request "led_g" 1
platform.request "led_g" 2
platform.request "led_g" 3
platform.request "led_g" 4
Sync$ asd ::= asd + 1
Sync$ dvi.r ::= 0x0
Sync$ dvi.g ::= 0x0
Sync$ dvi.b ::= 0x0
cx = to_signed dvi.pixel_x - (@x // 2)
cy = to_signed dvi.pixel_y - (@y // 2)
rx = cx * cx
ry = cy * cy
tx1 = (dvi.pixel_x - scroll ) & (1<<5)
ty1 = (dvi.pixel_y - scroll ) & (1<<5)
tx2 = (dvi.pixel_x + scroll ) & (1<<6)
ty2 = (dvi.pixel_y + scroll + 40) & (1<<6)
When
rx + ry < 200**2 ,->
Sync$ dvi.r ::= 0xF
#Sync$ dvi.g ::= 0xF
Sync$ dvi.b ::= 0xF
tx1 ^ ty1 ,->
Sync$ dvi.b ::= 0xF
tx2 ^ ty2 ,->
Sync$ dvi.r ::= 0xF
Sync$ dvi.g ::= 0xF
'''
'''
if __name__ == "__main__" =>
plat = ICEBreakerPlatform!
plat.add_resources$ pmod.dvi_12bit 0
plat.add_resources$ plat.break_off_pmod
#(import "/nmigen/cli/main" pure) (Top 800 480) plat
plat.build (Top 800 480 fps:60) do_program: ("--flash" in sys.argv) synth_opts: "-dsp -abc2 -relut"