103 lines
3.1 KiB
Plaintext
103 lines
3.1 KiB
Plaintext
import "/nmigen_boards.icebreaker/ICEBreakerPlatform"
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import "/nmigen_dg/*"
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import "/sys"
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import "common/to_signed"
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import "modules/vga/DviController12"
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import "modules/bad_apple/BadAppleDecoder"
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import "stdio/ice40pll/add_domain_from_pll"
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import "resources/pmod"
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Top = subclass Elaboratable where
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__init__ = x y fps ~> None where
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@x, @y, @fps = x, y, fps
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elaborate = platform ~> m where with m = Module! =>
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# Configure DVI controller
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dvi = Submodule.dvi$ DviController12 @x @y @fps
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# setup clock
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pll_config = add_domain_from_pll platform dvi.pix_freq
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print pll_config
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'''
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# Feed bad_apple to the DVI controller
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apple = Submodule.apple$ BadAppleDecoder!
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buffer = Memory
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width: 1
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depth: apple.size
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rdbuffer = Submodule.rdbuffer$ buffer.read_port!
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wrbuffer = Submodule.wrbuffer$ buffer.write_port!
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Sync$ wrbuffer.en ::= apple.pixel_valid
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Sync$ wrbuffer.addr ::= apple.pixel_x + apple.pixel_y*apple.h
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Sync$ wrbuffer.data ::= apple.pixel_data
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wait = Signal 30 reset:1
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Comb$ apple.next ::= 0
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When dvi.vblank_start $ ->
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Sync$ wait ::= wait.rotate_left 1
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Comb$ apple.next ::= wait!!0
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Comb$ rdbuffer.addr ::= (dvi.pixel_x >> 3) + (dvi.pixel_y >> 3)*apple.h
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pixel = Cat rdbuffer.data rdbuffer.data rdbuffer.data rdbuffer.data
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Sync$ dvi.r ::= pixel
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Sync$ dvi.g ::= pixel
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Sync$ dvi.b ::= pixel
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'''
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# Feed a picture to the DVI controller
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scroll = Signal 8
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period = int$ pll_config.achieved / @fps
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counter = Signal$ range period
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Sync$ counter ::= counter - 1
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When (counter==0) $ ->
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Sync$ counter ::= int period
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Sync$ scroll ::= scroll + 1
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asd = Cat
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platform.request "led_g" 1
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platform.request "led_g" 2
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platform.request "led_g" 3
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platform.request "led_g" 4
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Sync$ asd ::= asd + 1
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Sync$ dvi.r ::= 0x0
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Sync$ dvi.g ::= 0x0
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Sync$ dvi.b ::= 0x0
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cx = to_signed dvi.pixel_x - (@x // 2)
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cy = to_signed dvi.pixel_y - (@y // 2)
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rx = cx * cx
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ry = cy * cy
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tx1 = (dvi.pixel_x - scroll ) & (1<<5)
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ty1 = (dvi.pixel_y - scroll ) & (1<<5)
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tx2 = (dvi.pixel_x + scroll ) & (1<<6)
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ty2 = (dvi.pixel_y + scroll + 40) & (1<<6)
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When
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rx + ry < 200**2 ,->
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Sync$ dvi.r ::= 0xF
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#Sync$ dvi.g ::= 0xF
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Sync$ dvi.b ::= 0xF
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tx1 ^ ty1 ,->
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Sync$ dvi.b ::= 0xF
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tx2 ^ ty2 ,->
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Sync$ dvi.r ::= 0xF
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Sync$ dvi.g ::= 0xF
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'''
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'''
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if __name__ == "__main__" =>
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plat = ICEBreakerPlatform!
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plat.add_resources$ pmod.dvi_12bit 0
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plat.add_resources$ plat.break_off_pmod
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#(import "/nmigen/cli/main" pure) (Top 800 480) plat
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plat.build (Top 800 480 fps:60) do_program: ("--flash" in sys.argv) synth_opts: "-dsp -abc2 -relut"
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