25 lines
1018 B
Markdown
25 lines
1018 B
Markdown
|
# Ability to provide binary blobs to also be flashed to the FPGA's SPI flash
|
||
|
|
||
|
Whenever a SPI flash module is added to `nmigen-stdio` or wherever,
|
||
|
there should be an option to define binary blobs to be programed/flashed
|
||
|
along with the synthesized bitfile.
|
||
|
|
||
|
These binary blobs could either be added in `if __main__ == ...`, or possibly even during elaboration. Example:
|
||
|
|
||
|
```python
|
||
|
with open("myfile.bin", "rv") as f:
|
||
|
platform.add_spi_flash_data(start_addr=0x020000, label="riscv_program", data=f.read())
|
||
|
# 'data' could be optional for RTL generation, but required for building/programming
|
||
|
# perhaps an 'end_addr' or 'size' kwarg could be needed?
|
||
|
|
||
|
...
|
||
|
|
||
|
def elaborate(self, platform):
|
||
|
start_addr, size = platform.get_spi_flash_data(label="riscv_rom") # throws if the label is not defined
|
||
|
```
|
||
|
|
||
|
# Request for Comment:
|
||
|
|
||
|
Different FPGAs are programmed differently. The Ice40 usually write to the SPI flash when programmed,
|
||
|
but the arty 7 is only programed in RAM, without neccesarily writing to the SPI flash.
|