diff --git a/fpga/icebreaker.dg b/fpga/icebreaker.dg index 13c011e..0f0f471 100644 --- a/fpga/icebreaker.dg +++ b/fpga/icebreaker.dg @@ -1,7 +1,7 @@ import "/nmigen_boards.icebreaker/ICEBreakerPlatform" import "/nmigen_dg/*" import "modules/blinker/Blinker" -import "modules/blinker/Pulser" +import "modules/pulser/Pulser" import "resources/pmod" Top = subclass Elaboratable where diff --git a/fpga/modules/blinker.dg b/fpga/modules/blinker.dg index 573d45c..0ae5372 100644 --- a/fpga/modules/blinker.dg +++ b/fpga/modules/blinker.dg @@ -2,28 +2,18 @@ import "/nmigen/cli/main" import "/nmigen_dg/*" Blinker = subclass Elaboratable where - __init__ = ncycles pulse: False ~> None where + __init__ = ncycles ~> None where @ncycles = ncycles - @pulse = pulse @out = Signal! elaborate = platform ~> m where with m = Module! => counter = Signal$ range (@ncycles + 1) + Sync$ Drive counter (counter - 1) - if @pulse => - sync$ drive @out LOW - - when - counter == 0 ,-> - sync$ drive @out (~ @out) - sync$ drive counter @ncycles - otherwise ,-> - sync$ drive counter (counter - 1) - - -Pulser = bind Blinker pulse: True - + When (counter == 0) $ -> + Sync$ Drive @out (~ @out) + Sync$ Drive counter @ncycles if __name__ == "__main__" => blinker = Blinker ncycles: 10000000 - main blinker ports: [blinker.out] + main blinker name: "blinker" ports: [blinker.out] diff --git a/fpga/modules/pulser.dg b/fpga/modules/pulser.dg new file mode 100644 index 0000000..91b960a --- /dev/null +++ b/fpga/modules/pulser.dg @@ -0,0 +1,21 @@ +import "/nmigen/cli/main" +import "/nmigen_dg/*" + +Pulser = subclass Elaboratable where + __init__ = ncycles ~> None where + @ncycles = ncycles + @out = Signal! + + elaborate = platform ~> m where with m = Module! => + Sync$ Drive @out LOW + + counter = Signal$ range (@ncycles + 1) + Sync$ Drive counter (counter - 1) + + When (counter == 0) $ -> + Sync$ Drive @out HIGH + Sync$ Drive counter @ncycles + +if __name__ == "__main__" => + pulser = Pulser ncycles: 10000000 + main pulser name: "pulser" ports: [pulser.out]